[Libre-soc-dev] SVP64 bclrl

[Jacob Lifshay]

On Wed, Apr 6, 2022 at 9:02 PM lkcl <luke.leighton at gmail.com> wrote:
>     SVP64 Branches are specifically designed to spam
>     such an 8-way multi-issue Engine (having 8 Branch
>     Units) with a massive hit of *8* branches (one per
>     element) in a *single* clock cycle, with virtually no
>     modifications required to the Branch Units
>     themselves.
>
> an Architect unfamiliar with SVP64 will at first have a bit of an "oink" moment at that, but once the SVP64 paradigm sinks in an epiphany lightbulb will start to glow.

In other words, so we can have some semblance of efficiency, we need a
SIMD branch unit...that basically does exactly what I described, just
that conceptually it's running VL separate branches rather than 1
vector-reduce-branch.

Also, all the modern CPU block diagrams I've seen generally have 1 or
2 branch units, not 8.

Jacob