[Libre-soc-dev] in-order core hazard detection working

lkcl luke.leighton at gmail.com
Sun Nov 21 22:10:04 GMT 2021

for a given value of "work", and using TestIssuer with a long-running DIV instruction, the hazard detection is working.

the initial version is quite draconian: any hazard on the entire regfile port from any FU stops all FUs from using that port.

later a more targetted version can be done which tests only the register actually required, but for now it is good enough, there are higher priorities to sort out.

TestRunner was all over the place: of course it was only designed to cope with the original TestIssuer when it executed one instruction at a time, and now there are in-flight instructions it can't exactly cope.

in particular, quicker instructions (shorter pipelines) can complete *before* slower ones.

yes, an in-order core with instructions that complete out-of-order.  sigh.

i now need to create a series of instructions that denonstrate that the regfile cannot get corrupted.


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