[Libre-soc-dev] daily kan-ban update 17nov2021

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Nov 17 13:37:20 GMT 2021

On Wed, Nov 17, 2021 at 9:14 AM Cesar Strauss <cestrauss at gmail.com> wrote:
> Studying the Fetch Unit / Memory Bus interface (FetchUnitInterface and
> BareFetchUnit in src/soc/minerva/units/fetch.py) so I can plan how to
> write the Fetch pipeline unit.

this is the Fetch ospec()


class FetchOutput:
    def __init__(self): #, svp64_en):
        self.state = CoreState("core_fetched")
        self.raw_insn_i = Signal(32) # one raw instruction
        self.bigendian_i = Signal() # bigendian - TODO, set by MSR.BE

real basic, but contains everything needed by the Decode phase.


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