[Libre-soc-dev] NGI POINTER gigabit ethernet router ASIC roadmap
andrey at technepisteme.xyz
Wed Nov 3 15:40:38 GMT 2021
On 01/11/2021 13:27, Andrey Miroshnikov wrote:
> On 01/11/2021 11:11, lkcl wrote:
>> Andrey: we need a pinmux and peripheral autogenerator. it is planned
>> 2+ years ago and the frontend is already done, it generates CSV/JSON
>> files. litex is NOT going to be used, Florent has had 3 strikes (3
>> opportunities). instead we use nmigen-soc and CSR auto-allocation,
>> all dynamically allocated. integration with fuse-soc and nmigen is
>> apparently underway: this *may* prove useful but we have to see how it
> Started looking at the wiki page
> The page points to bug #8, and pinouts wiki page.
> The page mentions CMOS push-push on several occasions. The usual term
> related to IO is *push-pull* (using p/n channel, or pnp/npn transistor
> topology). Is the use of push-push a mistake, or intentional?
> The only mention of this term I've seen after a quick search is for RF
> oscillator for Terahetz system
> Probably not what was meant hahah
> As for the task, should I be looking at the following directory:
> and then testing out the examples, see what functionality is missing?
> For LS180, was the pinmux generated manually?
Probably got lost in your sea of emails Luke hahaha
Please let me know about the specifics of the task (or perhaps the
differences between LS180 and the router chip in terms of the pinmux).
I guess I could start by creating a new spec for the router chip pinmux
Should I call it "gigabit_router.py"?
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