[Libre-soc-dev] video assembler

Jacob Lifshay programmerjake at gmail.com
Mon May 10 20:44:24 BST 2021

On Mon, May 10, 2021, 12:00 Luke Kenneth Casson Leighton <lkcl at lkcl.net>

> basically, cycle accurate when in the context of simulator discussions
> means *program order* instruction accurate, it does *not* mean *hardware
> clock cycle tick* accurate.

my point is that "hardware clock cycle tick" accurate is the kind needed
for benchmarking, since some instructions may take no additional cycles
since they aren't on the critical path, whereas other instructions may be
more expensive than expected. Optimizing based on the number of
instructions executed will often give misleading results.

critical path pseudo-assembly example:
r1 <= mul r2, r3
r2 <= add r4, r5
r3 <= add r4, r6
r1 <= sub r1, r4

the first three instructions can (and probably will) be executed in
parallel, so having the two adds probably won't make the program any slower
than just having one add.


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