[Libre-soc-dev] first ISACaller LD/ST exceptions

Luke Kenneth Casson Leighton lkcl at lkcl.net
Mon May 10 18:19:23 BST 2021

i got basic LD/ST exceptions operational in ISACaller:

it's almost trivial, which if you think about it, is as it should be:
sometimes this has to be trap-and-emulate of misaligned accesses.
next phase is for TestIssuer to "match" that, which is a LOT more
complicated a path, tracking down into the MMU, through LDSTCompUnit,
then back to TestIssuer, then put that exception into PowerDecoder2
and have it re-run as a re-interpreted instruction, to generate the
"actual" trap instruction.


crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

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