[Libre-soc-dev] ISA analysis
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Sun May 9 17:33:15 BST 2021
On Sunday, May 9, 2021, Lauri Kasanen <cand at gmx.com> wrote:
> x86's most complex addressing mode. I wondered if they had added that,
> but turns out not.
> reg + reg*scale + disp8/32
> scale is one of 1, 2, 4 or 8.
when Vectorising the LD/ST ops i did wonder if something like that could be
added, however there just isn't the "base" (scalar) op to be able to do it.
btw Lauri, we should probably press forward with the video assembly even in
prototype firm, by using macro rewriting (the python SVP64Asm class).
it parses the SVP64 assembler format and turns it into prefix-suffix, i
think proceeding with that and writing pure assembler functions is probably
the way to break the critical path dependency.
what's your thoughts?
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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