[Libre-soc-dev] [RFC] svp64 "source zeroing" makes no sense

[Luke Kenneth Casson Leighton]

so on each iteration, here are the four options, assume predicates on both
src and dest:

* no zeroing.  this is a back-to-back VREDUCE-VEXPAND

*  source-predicate zeroing this is a VREDUCE with zeros inserted into the
output

* dest-predicate zeroing, this is a VEXPAND, but again anything that has
zeros in the *dest* predicate, rather than expand-insert a result a zero is
inserted instead

* src-and-dest zeroing, the only one that is slightly odd: it is a straight
linear element-matching operation where *either* src *or* dest zeros result
in a zero output.

the last one is the only one that is kinda redundant, you might as well
just AND the two predicate masks together.



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