[Libre-soc-dev] scalar bitmanip openpower extension draft

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Mar 10 23:40:53 GMT 2021


Toshaan, hi

above is a very early draft of a scalar bitmanip extension.  it's...
comprehensive, shall we say.  combining variants on the ternary op from
AVX512 some of which have not been seen before in any ISA and would allow
emulation of FPGA LUT4 behaviour for example.

general-purpose Galois Field arithmetic (multiply is a *four* operand input
although a case could be made for setting a "mode" just like in VSX Matrix
"accumulator" operations)

the usual suspects grevi, bpermd, bitmatxor, crc32, many of which come from
RV bitmanip.

it is a mish-mash basically and yet the case for many of them thanks in
particular to RV research is very clear.

some of them have to be added because they are in VSX (only), and of course
if no VSX then performance suffers.

integer minmax is a good example there.  there is a VSX minmax, there is FP
scalar minmax, but no *integer* scalar minmax.  quite an odd omission.

the only downside is, i wasn't kidding that they're comprehensive, i.e.
expensive in terms of opcode space.  these will need an entire major opcode
of their own.


crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

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