[Libre-soc-dev] scalar instructions and SVP64

Jacob Lifshay programmerjake at gmail.com
Wed Mar 10 01:22:06 GMT 2021

On Tue, Mar 9, 2021, 17:05 Jacob Lifshay <programmerjake at gmail.com> wrote:

> On Tue, Mar 9, 2021, 16:50 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
>> On Wednesday, March 10, 2021, Jacob Lifshay <programmerjake at gmail.com>
>> wrote:
>> > https://libre-soc.org/irclog/%23libre-soc.2021-03-10.log.
>> > html#t2021-03-10T00:11:21
>> >
>> > You see why we need VL to be ignored when there aren't any vector
>> > arguments?
>> late (1am), the short answer is no.
> Well, then we need to change the spec since a "no" answer is effectively
> unworkable from a SW perspective, as (poorly) illustrated by that example
> code. in compilers, and most the rest of SW, vector and scalar are two
> different classes of operations/types/values/etc. SV needs to be modified
> to account for that. scalar being just element 0 of a vector is deceptively
> alluring, but is really a trap.
> We can discuss in further detail after you get some sleep.


I guess you can summarize what I envision for svp64 as: prefix for
accessing stuff added with SV. one of the features is vector operation,
another independent feature is accessing registers > r31, another one is
predication, and so on.
using svp64 doesn't automatically enable everything always, so why should
vector/scalar be any different?
or, at least svp64 shouldn't automatically enable everything, all it does
is provide the instruction fields with which all the new features can be
independently enabled



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