[Libre-soc-dev] DCT/FFT augmentations

[Luke Kenneth Casson Leighton]

On 6/27/21, Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:

> am currently going through adding in the PowerDecoder2 modifications
> to support an implicit 2nd register, FRS, for fmadds/fmsubs/etc.

done, and functional, however i realised that the sourcing of the
registers is wrong.

i have:

FRT = FRA*FRC+FRB
FRS = -FRA*FRC+FRB

but actually it should be

FRT = FRA*FRC+FRA
FRS = -FRA*FRC+FRC

where even FRC is an implicit register, offset by VL, just as FRS is
an implicit register, offset by VL.

sigh.

l.