[Libre-soc-dev] Unexpected clock connexions.

[Luke Kenneth Casson Leighton]

On Thu, Jun 3, 2021 at 10:48 PM Jean-Paul Chaput <Jean-Paul.Chaput at lip6.fr>
wrote:

>
> Hello Luke,
>
> I started to lost the progression in the last thread about the
> clock tree. So bottom line for me:
>
> * At tomorrow noon I need something final, whatever is chosen.
>   Under the form of a Verilog files commited in soclayout so I
>   just have to run Yosys.
>

ok.  then because i am still awake (1 hour TZ) i will commit
the patch i sent, which keeps the pin names consistent in ls180
but still uses Staf's recommendation.

i will also add a corresponding build.sh


> * You don't need to run the nsxlib variant, for now it diverge
>   too much from the TSMC one. Will resync later.
>

ok.