[Libre-soc-dev] DCT/FFT augmentations

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sat Jul 3 15:34:32 BST 2021

On Sat, Jul 3, 2021 at 2:37 PM Hendrik Boom <hendrik at topoi.pooq.com> wrote:

> I cheated above.


> Once the bits are compacted into 64-bit words,
> I'm using bit-subscripts instead of word-subscripts.  So the inner
> loop gets optimised to performing bit operations on entire words
> instead of bit-by-bit.

yehh, the lowest we can go down to is 8 bit (elwidth=8).
fascinatingly there do exist vector processors and array
processors with bit-level ALUs.  the Aspex ASP, first versions
were 1-bit ALUs (about 3,000 gates... QTY 1024), the later
generations were 2-bit ALUs (QTY 4096), because 2-bit
multiply turns out to be really efficient.


More information about the Libre-soc-dev mailing list