[Libre-soc-dev] synchronised incremental SV development planning

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Jan 29 00:25:36 GMT 2021

ok where are we so far.

SVP64RM class reads CSV files, munges them, and creates matching
in1/2/3/out sel fields for EXTRA2/3 to augment RA/RB/RC/RS/RT.  likewise
for CRs

the next stage there will be to add those extended fields to PowerDecoder.
 after that, PowerDecoder2 can pick them up and identify vector/scalar and
extension of reg nums

i added an SVSTATE Record and also added it to the StateRegfile.

raised a bugreport about setvl, this is a lot of "funny stuff", goes into
the wiki fields, csv files and pseudocode.


crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

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