[Libre-soc-dev] synchronised incremental SV development planning
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Feb 1 15:54:57 GMT 2021
cesar i saw the addition of the gtkwave trace, very helpful, saves time.
i am currently on ISACaller, having decoded and identified an svp64 prefix,
based on an assembly instruction generated by SVP64asm with a .long in it.
the next stage will be putting in SVPSTATE.srcstep and "listening" to what
VL has been set to, this in a new ISACaller unit test.
the class GPR which contains the register values will need to "understand"
the SVSTATE.srcstep offset, so that a lookup ISACaller.GPR(RA) returns
GPR(RA+srcstep) and that basically is it.
should be a day or so and we will have a first simulated svp64 instruction
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
More information about the Libre-soc-dev