[Libre-soc-dev] [RFC] SVP64 Vertical-First Mode loops
richard.wilbur at gmail.com
Sat Aug 21 23:52:01 BST 2021
On Sat, Aug 21, 2021 at 3:42 PM lkcl <luke.leighton at gmail.com> wrote:
> On August 21, 2021 9:30:21 PM UTC, Richard Wilbur <richard.wilbur at gmail.com> wrote:
> >(The hard result cache needn’t be tied specifically to REMAP, it could
> >be used by normal vector or scalar code.)
> ya know... another name for "fast small hard result cache" is "register file"?
Is it? "fast", yes. "small", not necessarily.
> everything you described has the identical properties of a register file... :)
That's sort of what we want but don't have space in the instruction
format for the bits to specify the register numbers, right? So I see
this as an opportunity to create an algorithm-specific method of
addressing the new "registers". Another advantage of this scheme is
that it is never in need of saving and restoring with a context
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