[Libre-soc-dev] [RFC] SVP64 on branch instructions

lkcl luke.leighton at gmail.com
Wed Aug 4 18:45:19 BST 2021

On August 4, 2021 1:14:40 PM UTC, lkcl <luke.leighton at gmail.com> wrote:

>regarding overwrite and use of AA for alternative purposes, i realised
>after some thought that actually, combining the predicate mask with the
>Vector-Branch-CR test is not appropriate to do inside Branch itself.

... but _is_ appropriate for svstep mode, to allow some
situations where you want to know what a REMAP schedule might look like (and to obtain all the endpoints of all loops in one hit), yet in others you don't care, you just want to branch/loop.

i've therefore put re-purposing of AA as Rc back.in, sigh.

implementations of this are going to be... tricky. although, just thinking about it: hypothetically, and just like LD/ST, it may still be possible to use the existing scalar v3.0B instruction, but "fake" what data it receives.

(for Vector LDST in ISACaller i actually changed the immediate D to contain D*srcstep and other modes. something similar might be possible with branches. have to see)


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