[Libre-soc-dev] [RFC] SVP64 on branch instructions

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sun Aug 1 18:49:31 BST 2021

On Sun, Aug 1, 2021 at 6:15 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
> On Sun, Aug 1, 2021, 06:32 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
> > should modes be added which check *all* CR fields bring tested, or
> > just one, or add a bit to select either?
> >
> GPU code will need to very often branch if all/any predicate bits are
> set/clear, having a branch op that covers all 4 combinations would save a
> bunch of instructions (>5-10% in some common cases).

yowser, definitely worth it.

the CRM mode i had in mind to do something like this (merge all CR bit-tests)
but it turned out not to have enough space to do so.

if it's actually part of the *branch* instruction, that's fantastic
(and, logically,
the right place for it)


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