[Libre-soc-dev] daily kan-ban update 18sep2020
colepoirier at gmail.com
Fri Sep 18 17:39:22 BST 2020
On Fri, Sep 18, 2020 at 9:32 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> On 9/18/20, Cole Poirier <colepoirier at gmail.com> wrote:
> if you can look at setting up chips4makers gitlab jtag code, replicate
> it, run the tests (cocotb is one of the dependencies) then document
> that and also add them to the build/install scripts etc that would be
> google gitlab chips4makers.
Already have it open, just was brain fogged and thought you were
planning on doing it, will do so today, gives me a reminder to
document the microwatt setup as well.
> >> * staf kindly gave some insights into chips4makers JTAG code
> >> * the interfaces we will add *only* those bare minimum that have
> >> existing code or is absolutely essential
> > Is this solely in ls180.py
> the pins yes
> >or also in a to-be-created soc file?
> i may see if i can modify versa_ecp5.py so as to avoid code duplication
Are those the only two files that are needed for the generic-derived
libre-soc 180nm platform?
> > That's fantastic! Can you detail who has contacted you wanting to help
> > out here, or privately (given they haven't yet agreed to the charter)?
> > I'd like to help with onboarding, etc.
> sent msg asking them to join list, this morning.
Great! Can't wait!
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