[Libre-soc-dev] daily kan-ban update 14sep2020
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Sep 14 23:59:31 BST 2020
wrote a unit test that combines the mmu and dcache modules, and after
spotting a couple of brackets missing on | and == it actually worked.
i am however noticing that cache entries are being overwritten which has me
going "hmm" somewhat.
still, leaving that aside the next thing is to try connecting up to
PortInterface and see how that goes.
also i looked at litex and how to add an ASIC style platform, it may just
be a matter of defining the pins.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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