[Libre-soc-dev] pia as cycle accurate simulator?

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Oct 15 12:31:59 BST 2020

On Thu, Oct 15, 2020 at 7:45 AM Lauri Kasanen <cand at gmx.com> wrote:

> I'd like to repeat my request for the simulator to be based on
> something existing (qemu, pearpc, etc) in C/C++.

ok, noted.  personally i agree with you: my experience with spike was
that it was really straightforrward.  here's where things stand:

* qemu is not cycle-accurate, it's a JIT.  it's flat-out eliminated on
this basis alone.
* pearpc is nowhere near complete (64-bit) and is in c
* IBM's simulator *is* complete, it's in c, it's proprietary, but IBM
would, if asked, actually consider opening it.
* gem5 power branch is still experimental, and is... quite hairy to
work with.  it's in c++.
* pia is not a simulator (no way to "execute" instructions) and would
be a big project.
* ISAcaller - part of LibreSOC - "does the job", is cycle-accurate, in
python is relatively slow, however has the advantage of being
co-developed with the HDL.

so those are the options, none of them particularly attractive.


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