[Libre-soc-dev] daily kan-ban update 10oct2020

Cole Poirier colepoirier at gmail.com
Sun Oct 11 22:57:15 BST 2020

On Sun, Oct 11, 2020 at 2:51 PM Cole Poirier <colepoirier at gmail.com> wrote:
> > > i have sim.py operational but versa_ecp5.py is not.  i back-tracked to
> > > mid-september and that will display one line of text on the serial
> > > console then stop.
> > >
> > > with no JTAG i can't get in and test it, i'll need to get some jumper
> > > wires or hack up the 20 pin connector that comes with an STLINKv2.

./versa_ecp5 --build just ran to the end successfully for me :)
./versa_ecp5 --load has some hardcoded vid, pid, which is confusing me
as that's not how I was able to use jtag in ecp5 examples:

make: Leaving directory
Open On-Chip Debugger 0.10.0+dev-01404-g393448342-dirty (2020-10-09-13:50)
Licensed under GNU GPL v2
For bug reports, read
DEPRECATED! use 'adapter driver' not 'interface'
DEPRECATED! use 'adapter speed' not 'adapter_khz'
Info : auto-selecting first available session transport "jtag". To
override use 'transport select <transport>'.
Warn : Transport "jtag" was already selected
Error: no device found
Error: unable to open ftdi device with vid 0403, pid 6010, description
'*', serial '*' at bus location '*'


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