[Libre-soc-dev] New AMD GPU BW Enhancing Shared L1 Cache

Cole Poirier colepoirier at gmail.com
Tue Oct 6 02:58:08 BST 2020

Came across this cool but very short (11 min) talk by the lead university
researcher responsible for the bandwidth enhancing cache coherency design
that should be in the forthcoming AMD GPUs. Cool idea. Reminds me slightly
(even though not directly related) of LDSTCompUnit’s batching.


Paper link is in the video description. Will add a link to the wiki


More information about the Libre-soc-dev mailing list