[Libre-soc-dev] efficient decoding algorithm for variable-length instructions
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Nov 26 12:56:25 GMT 2020
On 11/26/20, Jacob Lifshay <programmerjake at gmail.com> wrote:
> We *can* do that in GPU Mode, but, unless also supported in CPU mode,
> then all the scalar code and/or non-Libre-SOC CPUs can't benefit from
> the new compressed instructions. Results: additional power and
> performance wasted because we decided that people only need that if
> their CPU/task is GPU enough, even though it's readily evident from
> RVC that CPU tasks can and do benefit from compressed instructions.
indeed. so i jumped ahead a bit because gmail basic HTML is interfering.
basically the chances of acceptance of a peer/merged SimpleV (14 major
opcodes) without isolation are, well, none to... err... definitely
recognising that and accepting it gives us huge advantages, taking the
brakes off of some of the things that a "merged" version prevents.
that leaves, just as you insightfully outline, a lost opportunity for
OPF members that they might otherwise have...
... having noted that SV is behind an isolation barrier, Compressed
could be (scalar only) dropped onto a pair of Major Opcodes chosen at
the discretion of the OPF ISA WG.
whilst they are making that decision, we can proceed safely with demo
code behind an isolation barrier, even ship production silicon (as
long as the isolation barrier and what is behind it is "approved"),
whilst they mull over considering adopting *scalar* Compressed into
the fact that the C Major Opcodes used for
Compressed-behind-the-barrier and Compressed-if-in-v3.2+ are different
is completely irrelevant to us, because the compiler/binutils used for
3D and Video is completely different from the one used for v3.0/1/2
scalar standard OpenPOWER code.
bottom line we need to stop trying to fight to fit SV into v3.2+, it's
never going to happen, accept that, go with a VLE-like isolation bit
and run with it.
annoying as it is because it makes VM a hard dependency.
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