[Libre-soc-dev] efficient decoding algorithm for variable-length instructions
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Nov 26 02:33:30 GMT 2020
y'know what? suddenly occurred to me: i don't think we're being
radical enough. how about: we design something more akin to RISC-V
RVC 16/32/48/64 that uses 6 bits maximum to encode, and just do a
total re-map of all OpenPOWER 3.1B Major opcodes?
all bits *other* than the Major Opcodes would be left entirely
unmodified. EXT004 would map to 0b0001, EXT031 to 0b0010, EXT19 to
0b0011 etc. etc. etc.
More information about the Libre-soc-dev