[Libre-soc-dev] Hardware-accelerated specialized instructions
programmerjake at gmail.com
Fri Dec 11 00:25:34 GMT 2020
On Thu, Dec 10, 2020, 16:14 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> you make a hardware triangle fill unit like Jeff did, it's not going
> to do multiplication, is it?
it might, since the per-pixel function is just a vec4 dot product followed
by a reciprocal and a pile of mul-adds.
> so the RISC microcoding approach tries to get half way. VSX has
> Rijndael 128 bit sub functions which, unfortunately, are great at 128
> bit AES and useless at 256 bit AES.
actually, I'm pretty sure your wrong here. for 256-bit AES, the key
schedule changes but each of the actual encryption steps still do the exact
same 128-bit block operation.
x86 AES instructions are nearly identical and x86 has no issues with
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