[Libre-soc-dev] v3.1B prefix
colepoirier at gmail.com
Sat Dec 5 17:06:27 GMT 2020
On Saturday, December 5, 2020, Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> carrying on from late last night: some recovery of prior work done can
> be achieved in the following way:
> 32bit SV instructions can be invented by:
> - selecting 1 or 2 major opcodes
> - using the older SV-P48 11 bit format
> - taking the v1 16bit Compressed form
> - joining the 3 together
This answers some of my questions from last night. Important lesson, it’s
better to wait and see what your subsequent emails say.
> following on from that:
> - given that these are SV prefixed
> - given that they are v3.0B 32bit
> - logically it follows they fit v3.1 64 pref
> - *and the 24 bits are entirely free*
> this i feel is how we should do src1/src2 swizzled operations, for
> example. there will be limitations on both the range of registers and
> also the range of operations (because C16 is so small) however it is
> better than a kick in the teeth.
Yes, better to try to do a little with a little than a lot with nothing.
> and, if the C bank-selection idea is kept, even the v3.1 prefixed ops
> can be retargetted to specialist tasks when needed most.
> in particular: the 2 bits N and M of the 16bit form, by not doing
> "state" any more, may be allocated to alternative purposes. the
> highest priority of these i feel would be one for selecting between CR
> or INT predication. the other for extending the ops that can be
> although to be honest with the focus being entirely different, a full
> redesign of C16 to only be SV prefixed is probably on the cards.
> we have to invent an entire sub-ISA which is EXACTLY what i did not
> want us to be doing.
My mental model is stuck on this: is the C bank switching done through the
VLE page table bit? Following from this, is the invention of an entire sub
ISA behind this protection/isolation VLE-like page?
A simple yes or no to both questions is sufficient for me to progress in
developing my mental model.
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