[Libre-soc-dev] [Mesa-dev] Loading Vulkan Driver
programmerjake at gmail.com
Mon Aug 24 01:01:19 BST 2020
On Sun, Aug 23, 2020, 16:31 Dave Airlie <airlied at gmail.com> wrote:
> It's hard to know then what you can expect to leverage from Mesa for
> that sort of architecture, the SPIRV->NIR translation, and then you
> probably want some sort of driver specific NIR->LLVM translation,
> amdgpu is completely scalar, llvmpipe is manually vectorised, swr does
> something like you might want, afaik it does a scalar translation and
> then magic execution (but I haven't dug into it except to fix
Kazan isn't built on Mesa or NIR (though it was originally intended to
integrate with Mesa). Luke decided that Libre-SOC should also have a
similar Mesa-based driver and applied to NLNet for funding for it, Vivek is
currently starting on implementing that Mesa driver.
> I think you will hit problems with vectorisation, because it's always
> been a problem for every effort in this area, but if the CPU design is
> such that everything can be vectorised and you never hit a scalar
> path, and you workout how texture derivatives work early, it might be
> something prototype-able.
My current plan for screen-space derivatives in Kazan is to have the
fragment shaders vectorized in multiples of 4 pixels (IIRC there's a nvidia
vulkan extension that basically requires that), so adjacent fragment shader
can be subtracted as-needed to calculate derivatives.
> But none of the current mesa drivers are even close to this
> architecture, llvmpipe or swr are probably a bit closer than anything,
> so it's likely you'll be doing most of this out-of-tree anyways. My
> other feeling is it sounds like over architecting, and reaching for
> the stars here, where it might be practical to bring vallium/llvmpipe
I would expect it to be quite easy to get llvmpipe to run on Libre-SOC's
processor, since it is PowerPC-compatible, it just won't have very good
performance due to llvmpipe's architecture.
up on the architecture first then work out how to do the big new
> thing, or bring up this architecture on an x86 chip and see it works
> at all.
The plan is to get Kazan working with vectorization on x86, then change the
backend out to unmodified PowerPC (LLVM may scalarize the instructions
here), then add the new vector ISA to the PowerPC backend, then add custom
instructions as-needed to improve performance.
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