[Libre-soc-dev] daily kan-ban update 20aug2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Aug 20 20:42:50 BST 2020

On Thu, Aug 20, 2020 at 8:31 PM Alain D D Williams <addw at phcomp.co.uk> wrote:

> For the avoidance of doubt: by saying "we are not doing that." what you mean is
> that we are not "leaving that to a *dedicated* VPU", ie we will be doing those
> things [[ H.265 & VP9 ]] in our CPU-GPU-VPU commercial product.

as actual extensions to the actual POWER9 instruction set, yes.

> > we are *specifically* augmenting a *general-purpose* ISA so that it
> > has the capacity to perform reasonable video decoding *without*
> > requiring a completely separate VPU hard macro.
> So you will say 'yes' to my interpretation above [[ which was my original
> understanding ]].

well, there's two approaches to "add some instructions" which still
leaves space for ambiguity.

1) add an instruction which helps massively accelerate a
*software*-based algorithm.  typically completes via a pipeline just
like any other ALU operation.  reads and writes from regfile just like
any other ALU operation.

2) add an instruction which "fires" a special VPU block which "Does
The Right Thing (tm)" i.e. does the ***ENTIRE*** H.265 frame decode.

we are ***NOT** doing approach (2)

we are **SPECIFICALLY** doing approach (1).

this will usually involve "YUV2RGB pixel conversion" or "take this
vector and perform a DCT on it, SIMD-style".

note that approach (2) is generally not done: it's a waste of
instruction space, because there are better methods.  instead the VPU
operation is fired off via DMA or as its own completely separate
memory-mapped peripheral.  no augmentation of the ISA is involved at
*all*.  the only reason i mention (2) is to illustrate (1).


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