[Libre-soc-dev] 3D MESA Driver
programmerjake at gmail.com
Mon Aug 10 17:48:45 BST 2020
On Mon, Aug 10, 2020, 09:30 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> On Mon, Aug 10, 2020 at 5:15 PM Jacob Lifshay <programmerjake at gmail.com>
> > On Mon, Aug 10, 2020, 08:57 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> > wrote:
> > > normally, the tiling area would be part of the GPU: the CPU would
> > > never, under any circumstances, get access to it - or even know it was
> > > there. those tiles would be copied directly out to the framebuffer by
> > > a DMA engine (or straight memcpy) done on the *GPU*.
> > >
> > Actually, for a lot of GPUs, they render directly to the frame buffer,
> ah i think i was thinking of the Broadcom VideoCore IV which if
> memory serves correctly has a tile (or z?) buffer SRAM, which it
> *then* writes out (directly) to the framebuffer)
> > then
> > the video scan out hardware is told to page flip to the just rendered
> > buffer.
> (double buffering). yes, Richard Herveille's RGBTTL HDL has a double
> buffering capability, which we can use for this purpose.
Hopefully, it supports more complex schemes as well, since Vulkan on
Wayland explicitly requires VK_PRESENT_MODE_MAILBOX_KHR support, which is
an interesting variant of triple (or more) buffering, optimized for low
latency without tearing.
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