[Libre-soc-dev] 3D MESA Driver

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sun Aug 9 17:52:26 BST 2020


On Sunday, August 9, 2020, Lauri Kasanen <cand at gmx.com> wrote:

>
> > * SKIP addi r6, r6, 3 # vloop=1, subvloop=0, pred[vloop]=0
> > * SKIP addi r6, r6, 3 # vloop=1, subvloop=1, pred[vloop]=0
>
> Two r6? Did you mean r6 and r7?


yes.  i forgot to edit the last line because those two (r6 and r7) are
skipped (not issued) because thr pred bit 1 is zero.

l.



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