[Libre-soc-bugs] [Bug 1228] SFFS ISACaller userspace ELF support for dynamic linking and PIC

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Dec 4 11:36:34 GMT 2023


https://bugs.libre-soc.org/show_bug.cgi?id=1228

--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #7)
> I fixed lwarx and stwcx., and added the b/h/d versions while I was at it and
> added some tests for them.

fantastic.

> I also added a stub sync instruction, since it was missing.

good idea.

quad instructions are out of scope at the moment but see how that goes,
if there is a compile-time option to exclude them then take it.

> I implemented the writev syscall, and the statically-linked glibc binary
> finally printed a message:
> malloc(): corrupted top size

wha-hey!

> this indicates memory corruption somewhere, which will be *fun* to debug --
> or maybe I just need to implement relocations and that'll fix it...

yyeah the heap/stack may just not be big enough.

(In reply to Jacob Lifshay from comment #8)

> oh, I also added support for memory to ExpectedState.

bizarre, had i not already added it? well it is a good addition.

my thoughts: single-stepping through the entire program under qemu
using the Test API would give a FULL instruction AND register AND
memory-access trace that would allow instruction-by-instruction EXACT and 
i do mean EXACT replication such that "diff -u" tells you precisely
and immediately the deviation.

this was the technique i used (in HDL, under verilator, using the DMI
interface) to get precise and exact interoperability between TestIssuer
and Microwatt. tens of millions of instructions, and yet spotting the
one that went wrong was trivial due to nothing more complex than
running "diff -u"

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-soc-bugs mailing list