[Libre-soc-bugs] [Bug 1033] Implementation and enhancement of "Test API"

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1033

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #1)
> https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;
> h=a1ba910b1ac26158648b69d5cbd7556d9be3a6ef
> 
> important clarification -- afaict this task is adding new `StateRunner`
> and `State` subclasses for FPGA/verilator/etc.

pretty much yes. and morphing the existing Test API which is a bit of
a botch job to be more generic.


> This task is *not* for creating a new framework or choosing an existing
> framework,

correct 

> we already have one with implementations for pypowersim, nmigen simulation
> of the
> libre-soc core, and `ExpectedState`.

correct

>  maybe also QEMU through GDB, icr.

QEMU can be run but not through the Test API, it is also on the TODO list
to be added *to* the Test API.

Makefiles are probably the high priority, for running (ssh) on
a POWER9 system.

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