[Libre-soc-bugs] [Bug 1140] New: support instruction aliases

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1140

            Bug ID: 1140
           Summary: support instruction aliases
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: All
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: ghostmansd at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

We currently lack a way to provide instruction aliases. Supporting them is a
complex task, requiring at least these steps
(https://bugs.libre-soc.org/show_bug.cgi?id=1068#c42):

1) define the aliases format
2) define a *database* format for them and implement them in insndb
3) add aliases in pypowersim
4) UNIT TESTS for aliased instructions in openpower-isa and FINALLY - ONLY
THEN:
5) adding binutils support for the same aliases AND THEN
6) add unit tests for the same aliases in binutils AND THEN
7) run the same unit tests for openpower-isa but using binutils

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