[Libre-soc-bugs] [Bug 1127] Generating a Libre-SOC Microwatt-compatible core with SVP64

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1127

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #4)
> As you have suggested yesterday Luke, I tried running this mw+svp64
> libre-soc core within microwatt repo's verilator, and it runs hello world!

hooray.  so now you know, there is a bug in the version of
yosys you used to do the nextpnr-routing.  verilator could
not do a simulation if there was *actually* a combinatorial loop.

> Also started documenting the steps required to generate this core (still in
> progress): https://libre-soc.org/HDL_workflow/gen_core_with_svp64/

awesome.

> From the assembly file in hello world, I see that an instruction can be
> called by the machine code directly,
> https://git.libre-soc.org/?p=microwatt.git;a=blob;f=hello_world/head.S;

of course it can. that is what has been done for nearly 3 years now,
back when lauri first did the a/v mp3 work.

> Now I'll need to play with pypowersim to make some svp64 machine code, which
> I could then insert into the hello world code and try running it.

link it as a single static .o exactly as is done in media/ and you
should be done in well under 2 hours.  not one month of failing because
you're not asking for guidance and think that the goal is "i have to
do this entirely by myself".

also examine konstantinos's crypto/ work as he combines assembly
functions with c functions.  this is the calling convention match
up the registers declare a static header file BAM job is done.

https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=media/calling-conv;hb=HEAD

this is all extremely straightforward been done multiple times you
just need to get on with it.

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