[Libre-soc-bugs] [Bug 276] SR NAND Latch needed in nmigen

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=276

--- Comment #19 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
very useful tutorial / demo on cxxrtl simulation
https://tomverbeure.github.io/2020/08/08/CXXRTL-the-New-Yosys-Simulation-Backend.html

-- 
You are receiving this mail because:
You are on the CC list for the bug.