[Libre-soc-bugs] [Bug 656] add v3.0B BCD instructions to simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=656

--- Comment #4 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #3)
> (In reply to Jacob Lifshay from comment #2)
> 
> > do i = 15 to 0
> >     sum <- (0b0 || RA[4*i:4*i+3]) + (0b0 || RB[4*i:4*i+3]) + (0b0000 ||
> > carry)
> 
> note 4*i:  >>>63<<<
> not  4*i:  4*i+3

the code I wrote intentionally uses RA[4*i:4*i+3] since it's doing the add
4-bits at a time and manually propagating the carries rather than doing
sequence of 60, 56, 52, 48, ... 8, and 4 bit adds and relying on the add to
propagate carry implicitly. So, yes, 4*i+3 is correct here.

It uses a different algorithm than in the openpower spec.

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