[Libre-soc-bugs] [Bug 656] add v3.0B BCD instructions to simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=656

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #0)
> to get the carry-out bit, the pseudocode for addg6s will need to be
> rewritten into a "programmatic" way rather than a "here's the general
> idea of how to get the 65th bit from a 64-bit add"
> 
> do i = 0 to 15
>    dc[i] <- carry_out(RA[4*i:63] + RB[4*i:63])

the above pseudocode is copied from the spec and I'm assuming it is correct.

> will need to be changed to something like:
> 
>    temp <- (0b0 || RA) + (0b0 || RB)
>    dc[16] <- [0]*16
>    do i = 0 to 15
>        dc[i] <- temp[4*i]

That rewrite is incorrect, since if you add 0x10 + 0x20, it sets dc[15] = 1
even though 0 + 0 has no carry out.

corrected code (afaict):
dc <- [0]*16
carry <- 0b0
do i = 15 to 0
    sum <- (0b0 || RA[4*i:4*i+3]) + (0b0 || RB[4*i:4*i+3]) + (0b0000 || carry)
    carry <- sum[0]
    dc[i] <- carry

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