[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ok if you run this:
lkcl at fizzy:~/src/libresoc/soc/src/soc$ python3 decoder/power_svp64.py 

OrderedDict([('opcode', '0b1001'), ('unit', 'SHIFT_ROT'), ('internal op',
'OP_RLCR'), ('in1', 'NONE'), ('in2', 'RB'), ('in3', 'RS'), ('out', 'RA'), ('CR
in', 'NONE'), ('CR out', 'CR0'), ('inv A', '0'), ('inv out', '0'), ('cry in',
'ZERO'), ('cry out', '0'), ('ldst len', 'NONE'), ('BR', '0'), ('sgn ext', '0'),
('upd', '0'), ('rsrv', '0'), ('32b', '0'), ('sgn', '0'), ('rc', 'RC'), ('lk',
'0'), ('sgl pipe', '0'), ('comment', 'rldcr'), ('form', 'MD'), ('EXTRA0',
'd:RA;d:CR0'), ('EXTRA1', 's:RB'), ('EXTRA2', 's:RS'), ('EXTRA3', '0'),
('SV_Ptype', '1P'), ('SV_Etype', 'EXTRA3'), ('sv_in1', None), ('sv_in2', 1),
('sv_in3', 2), ('sv_out', 0)])

you can see now, the in1/2/3/out fields have been joined by sv_in1/2/3/out
which makes it dead-easy to know, in combination with SV_Etype, where to go
to get the SVP64 "extra" fields for a given register RA/B/C/RS/RT.

CRs are next

commit 41f1bc2c070cc47d1990955d60c899ad8fab88bb (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Wed Jan 27 18:16:47 2021 +0000

    move svp64 reg-decode function to more appropriate location
    use it in SVP64RM get_svp64_csv to decode EXTRA bit-field positions

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