[Libre-soc-bugs] [Bug 578] python-based svp64 "generator" class

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Jan 22 15:26:36 GMT 2021


--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

lkcl> lxo: ping.
<lkcl> question for you: would you be happy to do a python-based "translator"
from binutils-style svp64 syntax into ".long 0xnnnnn; opcodev3.0b"?
<lkcl> it's for use in the unit tests like this:
<lkcl> so that would be:
<lkcl> lst = SVP64translator(["sv.extsw r3.v, r0.s"])
<lkcl> and the output would be:
<lkcl> [".long 0xnnnnn", "extsw 3, 0"]
<lkcl> the context needs to be "picked up" - the mode - unfortunately - by
doing a lookup in the CSV output from the deduped opcodes program sv_analyse.py
<lkcl> https://libre-soc.org/openpower/opcode_regs_deduped/
<lkcl> end of this file
<lkcl> and the SVP64translator can read those CSV files, create a dictionary by
assembly-code name (first column in the CSV file) and look that up to find what
the "mode" is, EXTRA2 or EXTRA3 etc.

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