[Libre-soc-bugs] [Bug 204] Transition from symbolic to real Cell Library for 180nm layout

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=204

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|CONFIRMED                   |RESOLVED

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #7)

> * Then you can run the flow with ./build_full.sh in either
> experiments9/freepdk_c4m45 (long) or experiments10_verilog/freepdk_c4m45
> (faster). It currently still fails with an error in BigVia._doCutMatrix.

yes, i found this too - it is however part of coriolis2 not freepdk_c4m45

> I think this fulfills the requirement of this bug.

agreed.

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