[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #131 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #130)
> (In reply to Cole Poirier from comment #129)
> 
> 
> > > look at the DCD FT232 photo. does the numbering match?
> > > 
> > > 
> > > this is how mistakes are made.
> > 
> > It’s all there. If you do not like how it has been done please help and
> > modify it to suit your needs.
> 
> i am focussing mentally on bug #620.  i reveiewed what you did, and
> concluded:
> 
> 1) you missed the point that all FT232 PCBs are different

How about we focus on supporting the ft232 I have here to actually work with
instead of every one of the variants.

> 2) you missed the point that clarity is critical
> 3) if you are the one that makes the changes it trains you through "lrarning
> by doing"

So you’re saying to me that my learning is more important than us meeting the
tapeout deadline? Because by making me ‘learn’ you have wasted days of time
that could have been spent testing the ls180 over jtag on the FPGA.


> 
> if i do the task, you do not learn.  and, more thsn that, it stops me from
> completing other critical tasks.

Critical waste of time see above.


> > Given that we have mere days until the
> > deadline why don’t you contribute to this instead of unhelpfully pointing
> > out things you would do differently and saying they are wrong but doing
> > nothing to rectify this and actually helping.
> 
> if i stop what i am doing and complete the task that you are responsible for
> how does that help you or the project?

A week to make me ‘learn’, is ridiculously inappropriate given the
circumstances. You could do this in half an hour and we could make our tapeout
deadline. For some reason the tapeout deadline seems utterly irrelevant to you
here?

> (In reply to Cole Poirier from comment #128)
> > (In reply to Luke Kenneth Casson Leighton from comment #127)
> > > also: why have you removed the VERSA ECP5 images and tables?
> > > what is the purpose of removing perfectly good information
> > > that does not need modification?
> > 
> > Because it is not good information, you need to update it to conform to the
> > ft232 wiring colours.
> 
> the colours are according to the functions, and have not changed.  i already
> checked.

You checked but are in fact incorrect, the colours have changed. I triple
checked the wiki. They have changed.

> you did not change the colours on the ulx3s therefore because they represent
> the exact same functions on the ulx3s they represent the exact same
> functions on the VERSAECP5.

They have changed. Check again.

> if they were different i would have said something.
> 
> also if you had changed them, i would have instructed you to restore them
> because the change is not only unnecessary it also causes far more work
> (including causing me to have to re-edit the image tables)

The. You would have been incorrect.

> please put the diagrams back exactly as they were.

That will result in incorrect information on the wiki page.

> you are doing a lot of fighting, struggling, and stressing here, all of
> which is quite unnecessary, and is causing you to stop thinking rationally
> about this quite straightforward task.

It would be more straightforward if you would just do it instead of wasting
literally 4 days of the week we had to make the tapeout deadline. This is a
wildly inappropriate trade off in terms of what this has cost the project.

-- 
You are receiving this mail because:
You are on the CC list for the bug.