[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Apr 11 05:30:38 BST 2021


--- Comment #121 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #120)
> (In reply to Cole Poirier from comment #119)
> > Because you said to remove the VREF jumper cable
> no, i did not. read comment #102 agsin.
> jumper != the wire.  jumper == a 5 x 8mm black connector between two pins.
> read comment #102 again.  look at the photo.  where does it say the word
> you are not paying attention and are adding random words.
> this is the source of the confusion.
> > because VREF is supplied
> > by the FPGA, therefore there is not a pin connected for VREF, because it is
> > supplied by the FPGA?
> if the cable is removed there is not a way for the power from the FPGA to
> get to VREF on the FT232, is there?
> power cannot magically travel through the air, can it?

Ah confusion resolved. I figured out the last known good state of the page's
markdown and the two relevant images and have restored them. Can you please
review the wiki page now?

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