[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #97 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #96)

> Luke, my proposal is to change the wire colours of on the wiki specified for
> the fpga to the colours present on the ft232 6 pin female header.

great.

> Is it a problem that the f232r.c openocd file specifies trst and srst but
> not gnd and vcc? Or are gnd and vcc not specified in the openocd interface
> 'c' file because they are electrical and managed by power hardware on the
> ft232 chip?

you answered your own question.

> Any other concerns about this migration? Or once I put this on the ECP5_FPGA
> wiki page under a header titled 'jtag over ft232' will we be good to proceed
> with connecting the wires to the fpga and trying to get the jtag tap of
> libre-soc recognized?

that would be the obvious thing to do, wouldn't it?

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