[Libre-soc-bugs] [Bug 620] post-layout simulation needed using cocotb

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=620

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #7)
> I seem to have success in iverilog with the following code:
> 
> > `timescale 1ns/1ps
> > 
> > module clkdrv(output reg clk);
> > 
> > initial begin
> >     clk = 0;
> >     forever begin
> >         #10 clk = ~clk;
> >     end
> > end
> > 
> > endmodule

ah good! does the wb example work? or does it hang, still?
(i will run it in a bit, am in the middle of the cxxrtl test)

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