[Libre-soc-bugs] [Bug 488] Build test serdes on 180nm test chip for oct2020

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=488

--- Comment #5 from Jacob Lifshay <programmerjake at gmail.com> ---
I added PLL with 8-phase outputs and serializer/deserializer designs to the
wiki:
https://libre-soc.org/resources/high-speed-serdes-in-circuitjs/

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