[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Oct 30 21:59:39 GMT 2020


--- Comment #37 from Cole Poirier <colepoirier at gmail.com> ---
Created attachment 114
  --> https://bugs.libre-soc.org/attachment.cgi?id=114&action=edit

Luke, this is the image of the jtag jumper wires from the above FPGA JTAG wires
image, connected to the STLINKV2 pins

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