[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #37 from Cole Poirier <colepoirier at gmail.com> ---
Created attachment 114
  --> https://bugs.libre-soc.org/attachment.cgi?id=114&action=edit
STLINKV2 JTAG wires

Luke, this is the image of the jtag jumper wires from the above FPGA JTAG wires
image, connected to the STLINKV2 pins

-- 
You are receiving this mail because:
You are on the CC list for the bug.