[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Oct 30 21:57:03 GMT 2020


--- Comment #35 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #34)
> (In reply to Cole Poirier from comment #33)
> > Is the next step committing the code, 
> should have done that ages ago because it can't do "harm", can it?

Indeed. The code was only done recently as it relied upon the connections being
made here.

> > soldering the gpio headers, then
> > connecting it all together?
> after checking abour another 3 or 4 times yes.

Ok I've soldered the header on. Then *WITHOUT* power to the FPGA and *WITHOUT*
power to the STLINKV2 (i.e. *NO* power, or any other wires connected to either)
have wired up the jumper connections so that it can be checked here, will
upload the two necessary images right after this comment.

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