[Libre-soc-bugs] [Bug 510] New: check for combinatorial path through DIV FSM

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Oct 4 20:11:17 BST 2020


            Bug ID: 510
           Summary: check for combinatorial path through DIV FSM
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---


jacob when running nextpnr5 the highest reported path latency is through the
DIV FSM because the CompUnit Manager input snd output latches, controlled by
go/req from the regfiles are combinatorial *and* nextpnr5 is finding and
reporting a combinatorial through the FSM itself.

can you please take a look and see where that is, you can use "ltp" in yosys on
the compunit or pileline ilang file (after synth or synth_ecp5)

i suspect it is this:

      m.d.comb += self.n.valid_o.eq(~self.empty & self.div_state_next.o.done)

although it us likely to be more.  i think the root of the issue is that no
output should be copied excepy synchtonously or through a synchronous register.

i.e. referring to saved_state is ok because that is copied synxhronously and
thus creates a firebreak.

however referring to data.o directly and combinatorially is not.

this is a high priority issue as it will be picked up later during ASIC timing
analysis which is a month closer to the deeadline, which would be really bad to
try to "fix" with only days left before GDSII files are due.

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