[Libre-soc-bugs] [Bug 465] add LoadStore error and exception handling via PortInterface

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=465

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i just realised, this is going to need microwatt load-store (dcache path) error
flags, but not instruction (icache) error flags because that is a totally
diffwrent path.

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/experiment/mem_types.py;hb=HEAD

it's going to be the fields from this:
MMUToLoadStore1Type

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